Second-order Oversampled Delta-sigma Analog to Digital Converter


Abhirami S
TKM College of Engineering, Kollam
Vishnu D
TKM College of Engineering, Kollam
Sreelal S
ASCD/AVN, VSSC / ISRO, Trivandrum
Sajeena A
TKM College of Engineering, Kollam
Anu Assis
TKM College of Engineering, Kollam


The Delta Sigma modulation technology has been around for a while, but because of technological advancements, the devices are now more widely used and feasible. The work proposes a multi-bit Delta Sigma ADC of second order having a very low power consumption. MATLAB Simulink is used to develop both the Delta Sigma ADCs of first and second order and the digital output is passed through a digital filter to recreate the original signal. According to simulation results, at 100 KHz frequency of output sampling, the Delta-Sigma modulator exhibits a Spurious Free Dynamic Range of 95.38 dB, and also it demonstrates that the designed Delta-Sigma ADC is capable of achieving an ENOB (Effective Number of Bits) of 11.83 bits and an SNR of 72.99 dB.

December 22, 2023
Online ISSN